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Digital Systems Laboratory

A breadboard pic from out experiment, it looks like a C4, huh?
Finally, Spring 2013 term is finished and I started to summer school. I'm afraid spring term was not satisfying for me. Due to the hard electrical engineering courses like Signals&Systems, I failed this term in these theoretically courses. On the contrary, Digital Systems laboratory was so fun. Especially, It was great when we wrote code in Verilog. Addition to that, I would like to thank you to my teammate Göksenin for great teamwork.
I think It doesn't matter which language I write, I like coding's itself. Well, we did 8 experiment:

1-Binary and BCD Numbers
2-Combinational Logic Design with Decoders and Multiplexers
4-Flip Flops
5-Synchronous Sequential Circuits and Counters
6-Logic Design Using Verilog HDL and Xilinx ISE
7-Logic Design With Gate Level and Data Flow Modeling in Verilog-HDL
8-Verilog HDL Description of Sequential Circuits

You can find laboratory materials from here: